In recent years, SoC (System-on-a-Chip) such as a system LSI for a mobile phone has become multifunctional mainly because of the increased ease of IP (Intellectual Property) integration.
With the increase in the number of integrated IPs, the power consumption at the time of operation thereof has significantly increased. Therefore, for the LSI for use in portable equipment required to be driven with a limited battery capacity, the low power consumption has become more and more important.
In order to reduce the power consumption at the time of operation of the LSI, a technology called clock gating has been conventionally used because power consumption in a clock system accounts for a large share of the total power consumption in the LSI.
For example, in Kitahara, T. et al., “A Clock-Gating Method for Low-Power LSI Design,” Proceedings of the ASC-DAC '98, Conference, pp. 307-312 (Non-patent document 1), it is reported that power consumption can be reduced by 39% or more. However, under present circumstances, implementation of the clock gating is not sufficient (see Non-patent document 1). This is because, in view of the clock distribution, the number of circuits is explosively increased in a lower layer of a clock distribution hierarchy called a clock tree, which makes the conditions for implementing clock gating severer.
The conditions for implementing clock gating are those for determining in which case clock signal is to be distributed or not.
In such an environment, the inventors of the present invention have found that it is relatively easy to implement individual clock gating in a flip-flop disposed at the end of the clock tree, and have studied its implementation method.
As an attempt to implement gating at a flip-flop, for example, circuits as shown in Japanese Patent Application Laid-Open Publication No. 2000-232339 (Patent document 1) and Japanese Patent Application Laid-Open Publication No. 2004-056667 (Patent document 2) have been suggested. However, noise called a glitch that may occur on an actual circuit has not been sufficiently studied (see Patent documents 1 and 2).